I was chatting with a friend, another experienced EE, and somehow, we began talking about today’s designs and the challenge in getting the prototype in good shape, even if not ready for release. In ...

Why does the task of circuit debugging keep getting complex year by year? It’s no longer looking at the schematic diagram and sorting out the signal flow path from input to output. Here is a sneak ...

In a huge software project for an embedded application, a function behaved in a strange fashion. A variable, which must not be changed while the function is executed, was changed. The function itself ...

Verification engineers continually report that up to 70% of the total engineering time spent on verification is consumed by debug, particularly when relying on disparate tools across multiple vendors.