I have a question on the following section of the adxl38x fifo example under https://github.com/analogdevicesinc/no-OS/blob/main/projects/eval-adxl38x/src/examples ...
I am writing to report a bug (or maybe my mis-use) of the FIFO code generated by seq.FIFO. # simple.py from pycde import Input, Output, Module, System, Clock, Reset from pycde.types import SInt from ...
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