EDN

Phase-Locked Loop Applications

This application note discusses phase frequency detector characteristics that affect phase-locked loop (PLL) dead band and jitter performance. In PLLs that employ charge pump loop filter designs the ...
Electronic Design

Phase-Noise Modeling, Simulation, and Propagation in Phase-Locked Loops (Part 3)

Some brief theory and typical measurements of phase noise. How to produce the lowest phase noise at a PLL output. A standard design procedure for a typical Type 2, second-order loop. As stated in ...
EDN

Free phase-locked loop (PLL) analysis software

Editor's Note: Although the primary target market for the 86100CU-400 application presented below is for ASIC/SoC designs, I'm assured by the folks at Agilent that this application is also applicable ...
AZOM

Principles of Phase-Locked Loops (PLL)

Learn about the working principles of Phase-Locked Loops (PLL) and why they are widely used for applications where frequency tracking, resonance driving, and oscillator control are required.
Electronic Design

How to Design Very Wide Loop BW High-Performance PLL Frequency Synthesizers (Part 3)

A special technique produces very wide loop BWs in high-frequency PLLs (and hence, indirect (PLL) synthesizers), thereby achieving very low phase noise rivaling that of direct (MMD) synthesizers. A ...
Hackaday

An Arduino As A PLL

At the heart of many amateur radio and other projects lies the VFO, or Variable Frequency Oscillator. Decades ago this would have been a free-running LC tuned circuit, then as technology advanced it ...
Design-Reuse

Analysis and Summary on Clock Generator Circuits and PLL Design

The demand for analog and mixed-signal-based integrated circuits (ICs) has surged due to the increasing reliance on electronic-based applications across industries. As the world transitions to more ...
Design-Reuse

TSMC PLL _ Clock Generator / Clock Synthesizer / Phase-Locked Loop, (Fractional / Integer)

The ARKCHIPS PLL is a versatile and stable general-purpose frequency synthesizer with phase synchronization(de-skew) Phase-Locked Loop (PLL) : feedb ...