Design-Reuse

Codasip and UltraSoC deliver advanced RISC-V SoC analysis and debug

San Jose, CA , Nov. 22, 2016 – Codasip, the leading RISC-V processor IP provider, and UltraSoC, the leading provider of semiconductor IP for on-chip analytics, performance optimization and ...
GIGAZINE

I tried running and debugging an LED blinking circuit on the RISC-V core of the 'Raspberry Pi Pico 2'

This time, I will try to run and debug the LED blinking using the Raspberry Pi Pico 2 and Raspberry Pi Debug Probe provided by the Raspberry Pi development team. I will use Ubuntu for building and ...
New Electronics

UltraSoC selected by Andes for RISC-V development with trace and debug

Andes Technology, a leading CPU IP supplier, has adopted UltraSoC’s advanced embedded analytics technology for use in its AndesCore range of RISC-V processors. Andes said that it would look to ...
Semiconductor Engineering

Efficient Trace In RISC-V

Systems with RISC-V cores often include multiple types of other processors and accelerators. Peter Shields, product manager for Tessent at Siemens Digital Industries Software, talks about what’s ...
Electronic Design

Working with High-Level-Language Debuggers in RISC-V-Based Apps

What are the RISC-V External Debug Support Version 0.13.2 specifications? Advantages of a using high-level-language debugger. The role of the ubiquitous breakpoints in debugging. How trace is ...
Semiconductor Engineering

Manage Your Risk In RISC-V

Adoption of RISC-V processors is accelerating. This technology, like everything, comes with benefits and risks. The open standard means freedom for many developers, but success depends on the ...
New Electronics

Full RISC-V and CMake support added to NECTO Studio 2.0 IDE from MIKROE

Version 2.0 adds full RISC-V support and CMake project-native support, plus significant Editor, Designer & Code Model improvements. The NECTO Studio 2.0 is a complete, cross-platform software ...
Design-Reuse

RISC - DRV64IMZicsr - 64-bit RISC-V CPU with M, Zicsr extensions and External Debug support

The DRV64IMZicsr is a 64-bit RISC-V CPU with M, Zicsr extensions and External Debug support. As a part of the DRVX Core Family this unique CPU offers: ...
manilatimes

Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification

SAN JOSE, Calif., Feb. 20, 2025 (GLOBE NEWSWIRE) -- Breker Verification Systems today confirmed its RISC-V SystemVIP library components and test suite synthesis product portfolio is deployed in more ...
Electronics Weekly

Embedded Studio gets 64bit Risc-V support

Segger has added support for 64bit Risc-V to Embedded Studio. Covering CPUs including RV64I, RV64E and RV64GC with a floating-point unit, it comes integrated with emRun C/C++ runtime and emFloat ...