GitHub

Bitonic_sorter_v1_0_S00_AXI.v

// ADDR_LSB is used for addressing 32/64 bit registers/memories // ADDR_LSB = 2 for 32 bits (n downto 2) // ADDR_LSB = 3 for 64 bits (n downto 3) localparam integer ADDR_LSB = (C_S_AXI_DATA_WIDTH/32) ...
GitHub

Using Xilinx Vivado and VHDL

Git repository for the Introduction to FPGA Programming Using Xilinx Vivado and VHDL (16 hours, 4 CFU) PhD course at University of Torino, Physics Department. Lecture slides are available on the main ...
IEEE

Tutorial IND2A: Embedded Systems Design with Xilinx Virtex-5 Series FPGA

Abstract: Embedded systems design is a hot application field which merges logic design and processor-based hardware development in a single or few chips solution. In recent years, embedded ...