EDN

FPGA TOOLS: Altera suite handles complexity

Santa Cruz, Calif. — As design complexity increases, FPGA tools and design flows are looking more and more like ASIC design. Altera Corp. is accelerating that trend this week, with its Quartus 6.0 ...
Design-Reuse

Altera Delivers Major Advancements for High-Density Designs With Quartus II Software Version 6.0

First FPGA Vendor to Provide Comprehensive Native Support for the Synopsys Design Constraints (SDC) Format in its Design Software San Jose, Calif., May 8, 2006—Altera Corporation (NASDAQ: ALTR) ...
EDN

Altera’s new Quartus II draws on ASIC strengths

Addressing the ASIC-like attributes of its new Stratix FPGA family, Altera Corp. today will release version 2.1 of the Quartus II development software, which features, among other things, a new timing ...
Electronic Design

FPGA Design Suite Builds In Timing Analysis With Native Support For SDC Format

With FPGAs pushing aside ASICs in many complex designs, the limits of traditional FPGA timing-analysis tools are being stressed to the breaking point. So if you want to use today's high-end FPGAs in ...
Design-Reuse

Altera's Quartus II Software Version 10.0 Delivers Unprecedented Performance and Productivity for High-End FPGAs

San Jose, Calif., July 6, 2010—Altera Corporation (NASDAQ: ALTR) today announced the release of its Quartus ® II development software version 10.0, the programmable logic industry's number-one ...
CIOL

Altera unveils Quartus II v8.1

BANGALORE, INDIA: Reaffirming its leadership position in performance and productivity for CPLD, FPGA, and HardCopy ASIC designs, Altera Corp. today unveiled Quartus II software version 8.1. This ...